0 IS FALSE

1 Lab Notes

1.1 Xilinx ISE - Web-pack Software Instructions

  • When starting project this should be set into the top level schematic before hand -
    Property Name Value
    Family Spartan3
    Device XC3S200
    Package FT256
    Speed -5
    Top-Level Schematic
    Synthesis Tool XST (VHDL/Verilog)
    Simulator ISE Simulator (VHDL)
    EE Design Summary Check
  • Right click on FPGA device icon xc3s200-5ft256 to do the above
  • Starting a new project, pay attention to the first window were you select the info about your board and stuff. Very important. Top level source should be schematic
  • Two files are requires for each project:
    1. .ise file which stores the project information.
    2. .sch file which stores the schematics information.
    3. Your simulation is stored in .tbw file.
    4. If you rename the files outside the program they won't work
  • Opening an existing file:-
    1. Open the .ise file to open the project
    2. If the source file for the schematic is not found, click on the project file in the file tree(In the Source tab), Add source and add the .sch file.
  • To get the tool box on the left side, click on the Add symbol icon in the tool bar.
  • Then select All symbols in the Category menu
  • Then you can filter out the Symbols using the Symbol name filter
  • and2 means 2 inputs, and3 means 3 inputs and so on.
  • To connect gates and buffers, use the Add wire option from menu bar in the Add option.
  • To generate a programming file that is to be flashed into the board:
    1. Go to the processes window on the left-bottom:w
    2. Run - Synthesis
    3. Run - Implement Design
    4. Run / Re-run all - Generate Programming File
    5. Check in the console window for the message. successful
  • Adept Software is used to flash the bit file into the board
  • Without the board, we can simulate the output of the board in the software. (Lab1-Video part 2).
    1. Right click on the schematic file click New source
    2. Select Test Bench Waveform name your simulation with version number off-course. Finish.
    3. Don't edit anything in the Initial Timing Wizard for now.
    4. Now you have a default timing Diagram.
    5. Turn the switches on and off at different times to test it out.
    6. Now select the Behavioral simulation option from the sources for option.
    7. Now select the processes tab and Run Simulate Behavioral simulation
    8. This way you can verify your design before testing in the hardware

1.2 Nexus Board Number display Bool Values

Active High Circuit

## SW0 /a SW1 /b SW2 /c SW3 /d SW4 /e SW5 /f SW6 /g
0 1 1 1 1 1 1 0
1 0 1 1 0 0 0 0
2 1 1 0 1 1 0 1
3 1 1 1 1 0 0 1
4 0 1 1 0 0 1 1
5 1 0 1 1 0 1 1
6 0 0 1 1 1 1 1
7 1 1 1 0 0 0 0
8 1 1 1 1 1 1 1
9 1 1 1 0 0 1 1

Active Low Circuit

## SW0 /a SW1 /b SW2 /c SW3 /d SW4 /e SW5 /f SW6 /g
0 0 0 0 0 0 0 1
1 1 0 0 1 1 1 1
2 0 0 1 0 0 1 0
3 0 0 0 0 1 1 0
4 1 0 0 1 1 0 0
5 0 1 0 0 1 0 0
6 1 1 0 0 0 0 0
7 0 0 0 1 1 1 1
8 0 0 0 0 0 0 0
9 0 0 0 1 1 0 0

2 Lecture 1 *

2.1 wut

She uses an I-pad pro and an apple-pencil which is really annoying.. Guess what ..It isn't helping out with her handwriting. Reminds me of Dolores Umbridge – very brilliant thou..

2.2 Digital Design - text book

Digital Design -BY Morris Mano and Michael D. Cileti Pearson Ed. 2013 , 5th Edition

2.3 15 lectures -^ may increase based on time

2.4 IMP

For midterm, don't study to regurgitate shit she says, study to think Marked section on blackboard have notes Old midterms are really helpful – 7 years of that shit use it well If a solution is not posted she didn't solve it – looooooser Use a lot of keywords in the exams, gives you partial marks

2.5 Notes

  • Type of systems - Digital & Analog
  • Digital representations are very clear, obviously
  • Easier to understand – my ass
  • mostly accurate.. (We are engineers mostly not enough thou???)
  • Limitations -> Slow,cost cpu time, real world is analog.
  • D/A – D to A converter or Digital to Analog converter
  • Oscilloscope id used to analyze signals - also there is logic analyzer.. same purpose,,but they are different -look it up
  • Base conversion my ass..This is the 4th sem we are studying this bullshit..that we Google in real life.
  • Binary require 1 bit..obviously
  • Oct requires 3 bits..strange
  • Hex requires 4

3 Lecture 2 *

I was lazy and stayed home like a lazy prick.

Notes during study ……

  • BN are available to you, max num is BN -1 , B is the base and N is the number of digits in the base.
  • For hex counting range for 4 digits is 16N-1 but max placeholder is 163
  • Grey code is also called as RBC –> Reflected Binary Code
  • Also called as Unit Distance code or Minimum error Code
  • Also called cyclic code…
  • BTW it was invented by Frank Grey, shhhhhh
  • Binary to Grey code conversion video
  • grey code is a unweighted code
  • (number)GRAY
  • (number)BCD -> Binary coded decimal
  • For converting from BCD to decimal numbers, the decimal points are found out by multiplying the decimal bits with 2-1,2-2 and so on..
  • For converting from Decimal to BCD, pretend you are converting from hex and convert the hex to binary, if numbers in the binary format if greater that 10, it is invalid and cannot be converted.

4 Lecture 3 *

She is teaching the lecture 7 slide thou Binary Math

  • Binary Addition, simple – add 1+0 = 1 add 1+1=0 and carry 1 ,1+1+1=1 and carry 1.
  • Binary is easy to work with because hey only two digits
  • Binary subtraction is just addition of a negative number
  • Computers use the compliment system to identify +­ in binary numbers
  • 2's compliment system is the main used; system in computers
  • to convert negative number to signed binary – takes 1 compliment of the signed binary of the positive number add one bit. –> this is called the 2's compliment
  • (number)S2 is a signed binary number
  • (number)2 is an unsigned binary number
  • LSB -> least significant bit –— MSB -> most significant bit
  • overflow bit is ignored in all cases
  • When doing subtraction in binary the answers won't make any fucking sense in the beginning, Remember to use the signed bit. Convert the answer you get with 2 compliment to get the final number.
  • Look up for when this negative addition is invalid
  • Difference b/w signed and unsigned bits are important
  • twos compliment of a two's compliment gives the original number
  • largest signed number in a 8 bit register -> 27 -1
  • largest unsigned number is a 8 but register -> 28 -1
  • adding positive and negative number in binary the overflow bit is discarded.
  • the overflow bit is the bit that goes over the signed bit position.
  • Take a good look at overflow errors, very very important for exam
  • To add negative binaries add the twos compliment of the negative number, with same number of bits.
  • When adding two negative binary numbers, keep the 0 in MSD and then take the 2 'compliment for the final answer.

5 Lecture 4 *

Binary Multiplication and division.

  • BCD -> Binary Code Decimal numbers they are just HEX numbers representing every digit in the Decimal member.
  • BCD Addition
  • 1 BCD requires 4 bits.
  • 1 HEX requires 4 bits.

6 Lecture 5 *

She is actually teaching lecture 3

  • 1 nibble = 4 bits
  • 1 word = 8 or 16 bits.. no solid answer, often considered as one or two bytes.
  • parity bits are best used for error checking and correction.
  • Asynchronous transmission – remember Vim 8
  • NAND and NOR is more natural from perspective
  • you only need one of NAND OR NOR to design all logic gates or processes.
  • Study De-Morgan's law again, is very important.
  • Truth Tables have no memory.
  • Glitch - momentary lack in the information that triggers problems
  • Operator precedence is a thing - Study.
  • logic gates – Go from outputs to input, when logic gates are algebraically described – Yes the opposite of what you were thinking of.
  • Look into timing diagrams.
  • when drawing gate diagrams use semi-circles when you go over other circuit wires.
  • active low = idle high
  • active high = idle low.
  • for N input in the truth table there are 2n rows or combinations.

7 Lecture 6 *

  • SOP -> Sum of Products form.
  • POS -> Product of sum form.
  • Simplifying Boolean expression, Make into SOP form, then look for common factors.

8 Lecture 7 *

She's actually teaching lecture 6. Midterm is until lecture 8

  • Different methods for Digital circuit analysis
    • Truth tables
    • Boolean Algebra
    • Logic Circuits
    • Timing Diagrams
  • New one -> K-mapping also called as Karnaugh mapping. -> Look up real spelling lol
  • mainly using for 4 variable or even 3,…. 5 or 6 is fucking difficult.
  • Creating the main headings for the K-map is kinda like grey code, one input is altered every column .
  • Goal of K -map is to cover everything
  • Propagation Delay look it up

9 Lecture 8

Completing the last lecture up…

  • When you build a big circuit, like a machine… each part that is divided to do a specific task needs to be turned on/off depending upon its usage.. Midterm
    1. multiple choice
    2. short answer question
    3. There will be a question like, here's some chips, build the cheapest circuit.
    4. One big question that integrate all the materials together.
  • its going to be long
  • 2 hours.. or 2 and half hours ..5 - 7:30pm
  • Rooms to be announced.
  • 6 questions and 1 bonus –> total 7 questions
  • Bonus question is going to be hard.

10 Lecture 9 *

File name- Lecture 09 - (02) Latches and flip-flops

  • They store only one bit of information. A single bit.
  • Asynchronous is more difficult to design, remember Vim 8
  • S = set , R = reset, FF = Flip-Flops
  • 1 and 1 inputs are usually semi-invalid.
  • Latches
  • Latches are used for sequential logic, unlike combinational logic, were memory is not used.
  • SR Latch is a common one- created using two NOR gates. Set and Reset inputs are used.
  • SR latch can be combined with enable
  • D-Latch is also a common one. D and Enable are the inputs here.
  • Flip-Flops
  • They doers not have their own memory.
  • When using flip flops the change in state happens only at the riding or falling edge of the timing diagram. -> Only 1 edge at a time
  • JK-Flip Flop is a common one. J and K are in the input.
  • JK is fully synchronous
  • Then there is also T flip flop and also D-ff and also S-R FF.
  • SR is the most common one, I guess.

11 Lecture 10 *

File name lecture 10 - (02) More about memory

  • Building an edge detector is important.
  • In SR - Flip-Flops when inputs are both 1, the output is always invalid.
  • In JK-FF, when both inputs are 1, the output is a TOGGLE
  • Toggle inverts the current output
  • Shift-Registers
  • These help us to transfer data from end to the other.

12 Lecture 11 *

Still teaching the old lecture, starting from page 3

  • Toggling means, swapping the output value, Low changes to high, high changes to low.
  • Page 4, of lecture 10.. the pattern of the timing diagram is that, output takes exactly double the time at each outputs from Q0 to Q2 respectively. –> And it is Asynchronous
  • If the circuit runs of the same clock it is synchronous else it is Asynchronous, like page 4
  • - Part I - Build a frequency divider of your choice for homework - Might be in the midterm.
  • - Part II - Do the same thing with 10 nanosec delay from each clock, - assume a 20 nanosec clock
  • Page 6 - If you need to move or shift 6 bits, you need 6 more bits, so 6 flip-flops.
  • Page 12 will be an example of a midterm question.
  • After like 4 more lectures, its gonna be all problems, not any new contents

13 Lecture 12 *

Teaching lecture 11 from slides

  • Finite state machines
  • Can be displayed as: A directed graph or A sequence chart
  • Made up of two components:
  • Memoryless gates and Memory elements
  • Use FF for synchronous FSM
  • Use Latches for asynchronous FSM -> We don't focus this
  • Rest of the lecture is written in Japanese so I understood nothing
  • Lecture slide 12 is more on FSM, yeah no shit

14 Lecture 13 *

Teaching from slides 13

  • 5 step design process
    • Give clear problem statement
    • List the scope and limitations of your solution
    • Identify logics needed
    • Use block diagram to design your solution
    • Check your design to see if it satisfies your problem statement
  • Main steps of arithmetic circuit
    1. Controller receives the input
    2. Which goes straight into the memory
    3. This is then transferred to Register
    4. This then goes to logic circuits where calculations happen
    5. The result is transferred to the Accumulator
  • The result in the accumulator might be transferred to memory if more calculations need to be done
  • Study and try recreate the 4 byte adder

15 Lecture 14

  • Decoders de-cript compact information into an elaborate form, for example BCD number can be decripted to a binary number using a decoder.
  • Decoders convert everything from Binary or BCD to other units
  • Encoders encrypt loose data into a compact and compressed form
  • Eg: Decimal to BCD
  • Encoders convert everything from other units to Binary or BCD.
  • Backpane/ LCD display will have seven inputs and wires for ground and power
  • LCD pane have seven segments so seven inputs
  • Inputs going into the LCD display might be passed through a voltage adjuster first to change the voltage of the coming input first
  • Multiplexer converts multiple inputs into one
  • Multiplexers can e used to implement a truth table
  • Demultiplexers takes 1 input and converts it into multiple outputs.
  • HW How all the above components are related and can be interconnected

16 Lecture 15

  • At this point we have studied everything we have to, now we are doing just design
  • Propagational delay
  • Go for the simpler circuit everytime, instead of thinking about unambiguous options and complex design.